Question

A RISC (Reduced Instruction Set Computer) architecture is primarily characterised by which of the following design choices?

Q: Answer-A RISC (Reduced Instruction Set Computer) architecture is primarily characterised by which of the fo...

RISC architectures favour a relatively small set of simple, typically fixed-length instructions that mostly complete in a single clock cycle, a large general-purpose register file to reduce memory traffic, and a load-store design where only dedicated loadstore instructions access memory, all of which simplify pipelining and improve throughput compared to CISC designs.

A The complete absence of any pipelining support

B Simple, typically fixed-length instructions that mostly execute in a single clock cycle, a large general-purpose register set, and a load-store architecture

C A large number of complex, variable-length instructions, many of which can directly access memory operands

D Microcoded instruction execution using a control store for every instruction

E Instructions that always require multiple memory accesses to complete

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